1. Technical Field
The present invention relates to a method for inspecting a pattern and a method for manufacturing a semiconductor chip having a circuit pattern.
2. Description of the Related Art
As a way to miniaturize an information technology device, a package in which a chip such as a semiconductor chip is directly mounted on a substrate, becomes popular. In this package, a dust on a pattern of the chip can cause a contact failure or poor characteristics. As a result, it is necessary to inspect the pattern to determine whether there is a significant defect in the chip before mounting it on the substrate.
A method of inspecting a pattern is shown in Japanese Patent Publication No. 2001-84379, where a pattern to be inspected is compared with a reference pattern obtained by imaging a non-defective pattern. Then, the differences between these patterns are acquired. An area where the difference is large is extracted as a defect region. Next, the size of the defect region is compared with a threshold value which is set in advance.
The threshold value differs according to a position in the pattern, because the density of the fine circuit pattern on the chip usually differs according to a position in the pattern. In other words, the complexity of the shape of the pattern causes a variation of the density and a necessity of fine segmentation of the pattern.
As a result, it is necessary to set a large number of threshold values according to positions in the pattern. Such setting takes a long time, resulting in lowering a working efficiency.